一、課程說明(Course Description)
<br>   This course addresses the VLSI implementation techniques for Digital Signal 
<br>Processing systems. Topics such as pipelining, retiming, folding/unfolding, 
<br>systolic array, fast convolution, discrete cosine transformation, scaling, 
<br>round-off noise analysis, and bit-level arithmetic 
<br>will be discussed in detail. Upon the completion, the students will be able to 
<br>implement a given DSP algorithm as an IC according to different design criteria.
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<br> 二、指定用書(Text Books)
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<br>Keshab K. Parhi, "VLSI Digital Signal Processing Systems - Design and 
<br>Implementation", Wiley-Interscience Publication, ISBN 0-471-24186-5, 1999.
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<br> 三、參考書籍(References)
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<br>None
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<br> 四、教學方式(Teaching Method)
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<br>Lecture by LCD projection
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<br> 五、教學進度(Syllabus)
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<br>1.	Introduction
<br>2.	Iteration Bound
<br>3.	Pipeline and Parallel Processing
<br>4.	Retiming
<br>5.	Unfolding
<br>6.       Scheduling
<br>7.	Folding
<br>8.	Systolic Architecture
<br>9.	Fast Convolution
<br>10.	Algorithmic Strength Reduction
<br>11.	Pipelined IIR
<br>12.	Scaling and Roundoff Noise
<br>13.	Bit-Level Arithmetic
<br>A1.	The implementation of FIR
<br>A2.      JPEG for Image Compression
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<br> 六、成績考核(Evaluation)
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<br>Homework 30%, Midterm 30%, and Final Exam. 40%.
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<br> 七、可連結之網頁位址
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<br>http://larc.ee.nthu.edu.tw/~syhuang/VLSI_DSP
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