一、課程說明(Course Description)

此門課是積體電路設計自動化的入門課,介紹如何以高效能的軟體演算法來輔助積體電路設計的過程。主要內容包括邏輯自動化簡與合成,電路模擬,自動化佈局與繞線,電路驗證的輔助軟體工具等等。修習之後,學生將更了解這些積體電路設計輔助工具的內部機制

二、指定用書(Text Books)

Sabih H. Gerez, “Algorithm for VLSI Design”, John Wiley & Sons; ISBN: 0471984892, 1998.

三、參考書籍(References)

Shi-Yu Huang and Kwang-Ting Cheng, "Formal Equivalence Checking and Design Debugging," Kluwer Academic Publishers, 1998.

四、教學方式(Teaching Method)

(1) Three-hour lecture per week
(2) Homeworks require running IC design tools.
(2) Course project requires programming in C or C++

五、教學進度(Syllabus)

1. Overview of Electronic Design Automation
2. Algorithm and Complexity
3. Layout Compaction
4. Placement and Partitioning
5. Floorplanning
6. Routing
7. Simulation
8. Logic Synthesis
9. Formal Verification

六、成績考核(Evaluation)

10% homework(s)
30% midterm examination
30% final examination
30% course project

七、可連結之網頁位址

課程網址: http://larc.ee.nthu.edu.tw/~syhuang/EDA