一、課程說明(Course Description)
A laboratory course in VLSI design and its technologies
Please refer to
http://www.cs.nthu.edu.tw/~cthuang/

二、指定用書(Text Books)

Please refer to
http://www.cs.nthu.edu.tw/~cthuang/


三、參考書籍(References)

Please refer to
http://www.cs.nthu.edu.tw/~cthuang/


四、教學方式(Teaching Method)

Lecture and lab
Please refer to
http://www.cs.nthu.edu.tw/~cthuang/

五、教學進度(Syllabus)

1 Introduction to digital designs
2 Verilog modeling and tips
3 Revision control and regression test
4 Synthesis guide
5 Debugging, and design for testability
6 Concepts of automatic place and route
7 On-chip communications and system integration
8 Memory interface, modeling, and integration
9 *FPGA prototyping

Please refer to
http://www.cs.nthu.edu.tw/~cthuang/

六、成績考核(Evaluation)

Lab assignments and participation 60%
Midterm project and demo 20%
Final project and demo 20%

Please refer to
http://www.cs.nthu.edu.tw/~cthuang/

七、可連結之網頁位址

http://www.cs.nthu.edu.tw/~cthuang/