一、課程說明(Course Desc<x>ription)
<br>The memory hierarchy plays an increasingly important role in determining the cost, performance, power consumption, and reliability of SoC, mobiles, PCs, and datacenters.  Students interested in these industries or research areas may want to have architectural-level knowledge in the memory hierarchy.  This course introduces architectural-level techniques of designing, managing, and optimizing a memory hierarchy at all levels, including on-chip caches, main memory, storage caches, and storage.  In addition, emerging topics such as active storage and processing in memory will also be introduced.
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<br>二、指定用書(Text Books)
<br>Selected papers from computer architecture conferences
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<br>三、參考書籍(References)
<br>"Memory Systems: Cache, DRAM, Disk", Bruce Jacob, Spencer Ng, David Wang, 2010
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<br>四、教學方式(Teaching Method)
<br>Lecture, paper presentation by students, in class discussion, 
<br>programming assignments, midterm exam, Final exam
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<br>五、教學進度(Syllabus)
<br>1.	On-chip caches 
<br>2.	Main memory 
<br>3.	Storage caches
<br>4.	Solid state storage 
<br>5.	Active storage, processing in memory, datacenter storage
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<br>六、成績考核(Evaluation)
<br>暫定大方向、細節可能再調整(Tentative)
<br>Paper presentation 10%
<br>Programming assignments 30% 
<br>Midterm exams 30%
<br>Final exam 30%
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<br>七、可連結之網頁位址