一、課程說明(Course Desc<x>ription) 
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<br>We will discuss several advanced concepts of computer architecture for modern machines. The focus will be 
<br>on both single-thread and multi-core performance. The parallelism of instruction execution, data/vector, and 
<br>threads are examined in details. The concepts will be reinforced through programming assignments. Students 
<br>will perform hands-on simulation and analysis of several architecture techniques. It is recommended that 
<br>students have taken undergraduate computer architecture course.
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<br>二、教科書(Textbooks) 
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<br>“Computer Architecture --- A Quantitative Approach” by John Hennessy and David Patterson, 6th Edition, 
<br>2017, Morgan Kaufmann
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<br>三、參考書籍(References) 
<br>* Microprocessor Architecture -- From Simple Pipelines to Chip Multiprocessors. Jean-Loup Baer, Cambridge 
<br>Univ. Press, 2009.
<br>* Memory Systems: Cache, DRAM, Disk by Bruce Jacob and David Wang, Morgan Kaufmann, 2010
<br>* Multi-Core Cache Hierarchies, by Rajeev Balasubramonian, Norman Jouppi, and Naveen Muralimanohar, 
<br>Morgan & Claypool 2011.
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<br>四、教學方式 (Teaching Method) 
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<br>Lectures.
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<br>五、教學進度(Syllabus) 
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<br>1.	Fundamentals of Quantitative Design and Analysis
<br>2.	Memory Hierarchy Design
<br>3.	Instruction-Level Parallelism and Its Exploitation
<br>4.	Data-Level Parallelism in Vector, SIMD, and GPU Architectures
<br>5.	Thread-Level Parallelism
<br>6.	Warehouse-Scale Computers to Exploit Request-Level and Data-Level Parallelism
<br>7.	Domain-Specific Architectures
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<br>六、成績考核(Evaluation) 
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<br>* Homework 10% 
<br>* Programming Assignments 40% 
<br>* Midterm Exam 25% 
<br>* Final Exam 25% 
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<br>七、可連結之網頁位址 
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<br>(Under construction)
<br>http://www1.ee.nthu.edu.tw/ee645500/ 
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