一、課程說明(Course Desc<x>ription)
<br>This is a course on algorithms for VLSI physical design automation. Topics 
<br>include partitioning, floorplanning, placement, routing, and other related 
<br>issues. 
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<br> 二、指定用書(Text Books)
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<br>N/A
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<br> 三、參考書籍(References)
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<br>Technical papers will be chosen from premier CAD conference proceedings and 
<br>journals.
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<br> 四、教學方式(Teaching Method)
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<br>Lecturing and discussions
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<br> 五、教學進度(Syllabus)
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<br>(1)Introduction 
<br>   (a)VLSI design flow
<br>   (b)Problem subdivision in physical design
<br>   (c)Design st<x>yles                                              
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<br>(2)Circuit Partitioning
<br>   (a)Min-cut bipartitioning 
<br>   (b)Performance driven clustering
<br>   (c)Cut size and performance driven 
<br>       partitioning/clustering                                  
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<br>(3)Floorplanning & Placement 
<br>   (a)Floorplan representations 
<br>   (b)Simulated annealing ba<x>sed methods
<br>   (c)Partitioning ba<x>sed methods
<br>   (d)Numerical methods                               
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<br>(4)Routing 
<br>   (a)Maze routing 
<br>   (b)Global routing
<br>   (c)Channel routing
<br>   (d)Clock tree routing
<br>   (e)Power/ground routing
<br>   (f)Interconnect planning and optimization 
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<br>(5)Other topics
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<br> 六、成績考核(Evaluation)
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<br>To be determined
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<br> 七、可連結之網頁位址
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<br>eeclass 數位學習平台