一、課程說明(Course Description)
The memory hierarchy plays an increasingly important role in determining the cost,
performance, power consumption, and reliability of SoC, mobiles, PCs, and
datacenters. Students interested in these industries or research areas may want
to have architectural-level knowledge in the memory hierarchy. This course
introduces architectural-level techniques of designing, managing, and optimizing a
memory hierarchy at all levels, including on-chip caches, main memory, storage
caches, and storage. In addition, emerging topics such as active storage and
processing in memory will also be introduced.

二、指定用書(Text Books)
Selected papers from computer architecture conferences

三、參考書籍(References)
"Memory Systems: Cache, DRAM, Disk", Bruce Jacob, Spencer Ng, David Wang, 2010

四、教學方式(Teaching Method)
Lecture, paper presentation by students, in class discussion,
programming assignments, midterm exam, Final exam

五、教學進度(Syllabus)
1. On-chip caches
2. Main memory
3. Storage caches
4. Solid state storage
5. Active storage, processing in memory, datacenter storage

六、成績考核(Evaluation)
暫定大方向、細節可能再調整(Tentative)
Paper presentation 10%
Programming assignments 30%
Midterm exams 30%
Final exam 30%

七、採用下列何項 AI 使用規則 (Indicate which of the following options you use to
manage student use of the AI)
1. 程式作業,禁止使用AI。
2. 其他有計分的課堂作業或報告中的「標題頁註腳」或「引用文獻後」簡要說明如何使用生成
式AI進行議題發想、文句潤飾或結構參考等使用方式。
2. 修讀本課程之學生於選課時視為同意以上倫理聲明。

七、可連結之網頁位址
使用清大eeclass